Product Summary
The MC68376BGCAB25 quad HDLC integrated multiprotocol processor, is based on the three-SCC MC68302 family of chips with the addition of the QH protocol and two extra serial DMA channels. The QH302 supports a total of four independent communications channels, handling two HDLC or transparent channels on SCC1.
Parametrics
Absolute maximum ratings: (1)Package Type: 144-pin thin quad flat pack (PV suffix); (2)Operating Voltage: 5 V; (3)Frequency (MHz): 16.67 MHz; (4)Temperature: 0 to 70 ℃.
Features
Features: (1)Independent direct memory access (IDMA) controller; (2)Interrupt controller with two modes of operation; (3)Parallel I/O ports, some with interrupt capability; (4)On-chip 1152 bytes of dual-ported RAM; (5)Three timers, including a software watchdog timer; (6)Four programmable chip-select lines with wait-state logic; (7)Programmable address mapping of dual-ported RAM and IMP registers; (8)On-chip clock generator with an output clock signal; (9)System control.
Diagrams
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![]() MC68376BGCAB25 |
![]() Freescale Semiconductor |
![]() 32-bit Microcontrollers (MCU) 32BIT MCU 8K ROM |
![]() Data Sheet |
![]() Negotiable |
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![]() MC6800 |
![]() Other |
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![]() Data Sheet |
![]() Negotiable |
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![]() MC6801 |
![]() Other |
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![]() Data Sheet |
![]() Negotiable |
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![]() MC68020 |
![]() Other |
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![]() Data Sheet |
![]() Negotiable |
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![]() MC68020CEH16E |
![]() Freescale Semiconductor |
![]() Microprocessors (MPU) 32-BIT MPU |
![]() Data Sheet |
![]() Negotiable |
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![]() |
![]() MC68020CEH25E |
![]() Freescale Semiconductor |
![]() Microprocessors (MPU) 32-BIT MPU |
![]() Data Sheet |
![]() Negotiable |
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![]() |
![]() MC68020CRC16E |
![]() Freescale Semiconductor |
![]() Microprocessors (MPU) 32-BIT MPU |
![]() Data Sheet |
![]() Negotiable |
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